module sw(input wire [9:0] hc,input wire [7:0] sw,output reg [7:0] m[0:199],input wire [7:0] n[0:199]);wire [7:0] i;always @(posedge hc[9])begin for (i=0;i<199;i=i+1)m[i]=n[i+1];m[199]=sw ;endendmoduleERROR:HDLCompilers:26 - "sw.v" line 26 expecting ')', found '['ERROR:HDLCompilers:28 - "sw.v" line 33 'm' has not been declaredERROR:HDLCompilers:28 - "sw.v" line 34 'm' has not been declared
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